Monday, 19 January 2015

CONGESTION CONTROL TECHNIQUES



Congestion needs to be analyzed after placement and the routing results depend on how congested your design is. Routing congestion may be localized. Some of the things that you can do to make sure routing is hassle free are:

Placement blockages: The utilization constraint is not a hard rule, and if you want to specifically avoid placement in certain areas, use placement blockages.
Soft blockages (buffer only)
Hard blockages (No std cells and buffers are allowed to Place)
Partial blockages (same as density screens)
Halo (same as Hard blockage but blockage can also be moved w.r.t Macro.)

Macro-padding: Macro padding or placement halos around the macros are placement blockages around the edge of the macros. This makes sure that no standard cells are placed near the pin outs of the macros, thereby giving extra breathing space for the macro pin connections to standard cells.

Cell padding: Cell Padding refers to placement clearance applied to std cells in PnR tools. This is typically done to ease placement congestion or reserve some space for future use down the flow.
For example typically people apply cell padding to the buffers/inverters used to build clock tree, so that space is reserved to insert DECAP cells near them after CTS.

Maximum Utilization constraint (density screens): Some tools let you specify maximum core utilization numbers for specific regions. If any region has routing congestion, utilization there can be reduced, thus freeing up more area for routing.

set_congestion_options -max_util 0.6-coordinate{837 114 1103 918}

16 comments:

  1. Here in placement blockage paragraph, you have specified Halo is same as soft blockage...i think Halo is same as hard blockage.
    correct me if i am wrong

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    1. Yes same....but halo can move with respect to macro postion

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  2. Yes Halo is same as Hard blockage not as a soft blockage

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  3. Yes Halo is same as Hard blockage not as a soft blockage

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    1. Hard blockage means there is no cell placed in that region including buffers and inverters.
      Soft blockage means there is a exception placing buffers and inverters.
      But in the halo we have a chance to place buffers so halo can be called as a soft blockage.
      This is my statement. Correct me guys if I'm wrong?

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  4. Yeah you are correct guys..

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  5. hi
    thanks for the info ur sharing with this block. it is very helpful.i worked on cadence EDI and new to ICC II. what are terminology for halo and blockages and cell padding and module padding in ICC ii. i heard something like bounding. can u give brief explanation and if i am wrong please correct me? thank you in advance

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  6. In some case hard blockages overlaps there will be no error,But if halo overlaps it is showing that macros are overlapping why

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    1. once halo is applied, it will become part of the macro. so the tool will consider it as macro itself and hence shows macro is overlapping.

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  7. Hai sir I completed Btech in 2018 , trained in VLSI physical design.is any opening for freshers?

    What is minimim pulse width vilotios?

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  8. This comment has been removed by the author.

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  9. how to do cellpadding and what is the command in ICC?
    whether cellpadding is done to individual std cell or group of std cells in congested area?

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  10. Thank you,,but can you explain how placement blockages (hard ,soft,partial) reduces the congestion ?

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  11. Hi , If Halso/Padding is placed across the std cells, it basically avoids placement of std cells nearby it right?? how filler or physical cells are sitting near the std cells even if padding is specified?

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