TEMPERATURE INVERSION:
Traditionally MOSFET drive
current (ID) reduced with increasing temperature. Hence for most cases worst
case delay corner used to be high temperature (100C or higher, depending on target
application). With transistor scaling, VDD and Vt have scaled but not as
aggressively as the rest of the parameters (such as gate oxide thickness,
channel length etc.). If you look at the MOSFET drive current equation,
So, ID varies linearly as u
(mobility) and (VGS-VT)2 or the overdrive
voltage. Both mobility and Vt reduce with increasing temperature and vice
versa. Interestingly, current is dependent on difference between Vg and Vt. So
there is contention between mobility and the (Vg-Vt) term, and the one with
more impact on the final current will determine if drive current increases or
decreases with increasing temperature. For scaled nodes, i.e. at lower
technologies VDD has scaled to values like 0.9V or lower, while Vt has not
scaled as aggressively (0.3~0.4V), because of which even though mobility
improves at low temperature, the increasing Vt and hence reducing (Vg-Vt) has a
greater impact on the current, resulting in less drive current at lower temperature
than at higher temperature. Hence, at scaled technology nodes, the low
temperature becomes the SLOW corner, not HIGH temperature, especially for the
HVT devices. This phenomenon is known has inverse temperature dependence in
MOSFETs.
plz give more focus to lower nodes for both lower & higher temperature effect
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