Benefits and risks of FINFET & FD-SOI compared to Bulk transistor.

Benefits and risks of finFETs compared to Bulk transistor.

Strengths	Weaknesses
Significant reduction in power consumption (~50% over 32nm)	Very restrictive design options, especially for analog – Transistor drive strength is quantized to multiples of a single fin width
Faster switching speed	Fin width variability and edge quality leads to variability in threshold voltage VT
Effective speed/power trade-off possible with multi-Vt	Extra manufacturing complexity and expense (~+3% according to Intel)
Availability of strain engineering
Opportunities	Threats
Low power makes 20nm technology deployable for mobile applications	The potentially superior electrical performance and simpler manufacturing of fully depleted SOI
Increase CPU speeds beyond 4GHz

Benefits and risks of FD-SOI compared to Bulk transistor.

Strengths	Weaknesses
Significant reduction in power consumption	High cost of initial wafers (~+10% over regular wafers, according to Intel)
Faster switching speed	Limited number of wafer suppliers
Easier, standard manufacturing process	Variability in VT due to variations in the thickness of silicon thin-film
Availability of back-biasing to control VT	Multi- VT more complex to implement
No doping variability	Lack of strain engineering
Layout library compatible with existing bulktechnologies	Thin channel limits drive strength
Opportunities	Threats
Simpler and more flexible alternative to finFETs if wafer cost issue can be overcome	High wafer cost threatens economic viability for wider market adoption
Better controllability for analog applications